1. Field of the Invention
Generally, the present disclosure relates to the fabrication of sophisticated integrated circuits including transistor elements comprising high-k metal gate electrode structures.
2. Description of the Related Art
The fabrication of advanced integrated circuits, such as CPUs, storage devices, ASICs (application specific integrated circuits) and the like, requires the formation of a large number of circuit elements on a given chip area according to a specified circuit layout, wherein field effect transistors represent one important type of circuit element that substantially determines performance of the integrated circuits. Generally, a plurality of process technologies are currently practiced, wherein, for many types of complex circuitry, including field effect transistors, CMOS technology is one of the most promising approaches due to the superior characteristics in view of operating speed and/or power consumption and/or cost efficiency. During the fabrication of complex integrated circuits using, for instance, CMOS technology, millions of transistors, i.e., N-channel transistors and P-channel transistors, are formed on a substrate including a crystalline semiconductor layer. A field effect transistor, irrespective of whether an N-channel transistor or a P-channel transistor is considered, typically comprises so-called PN junctions represented by an interface that is formed by highly doped regions, referred to as drain and source regions, and by a slightly doped or non-doped region, such as a channel region, disposed adjacent to the highly doped regions. In a field effect transistor, the conductivity of the channel region, i.e., the drive current capability of the conductive channel, is controlled by a gate electrode formed adjacent to the channel region and separated therefrom by a thin insulating layer. The conductivity of the channel region, upon formation of a conductive channel due to the application of an appropriate control voltage to the gate electrode, depends on the electronic characteristics of the channel regions, such as dopant concentration, band gap, the mobility of the charge carriers and, for a given extension of the channel region in the transistor width direction, on the distance between the source and drain regions, which is also referred to as channel length. Hence, the conductivity of the channel region substantially affects the performance of MOS transistors.
Presently, the vast majority of integrated circuits are based on silicon due to substantially unlimited availability, the well-understood characteristics of silicon and related materials and processes and the experience gathered during the last 50 years. Therefore, silicon will likely remain the base material of choice for future circuit generations designed for mass products. One reason for the importance of silicon in fabricating semiconductor devices has been the superior characteristics of a silicon/silicon dioxide interface that allows reliable electrical insulation of different regions from each other. The silicon/silicon dioxide interface is stable at high temperatures and, thus, allows the performance of subsequent high temperature processes, as are required, for example, for anneal cycles to activate dopants and to cure crystal damage without sacrificing the electrical characteristics of the interface.
For the reasons pointed out above, in field effect transistors, silicon dioxide is preferably used as a base material of a gate insulation layer that separates the gate electrode, frequently comprised of polysilicon or metal-containing materials, from the silicon channel region. In steadily improving device performance of field effect transistors, the length of the channel region has been continuously decreased to improve switching speed and drive current capability. It turns out that decreasing the channel length requires an increased capacitive coupling between the gate electrode and the channel region to avoid the so-called short channel behavior during transistor operation. Thus, the thickness of the silicon dioxide layer has to be correspondingly reduced to provide the required capacitance between the gate and the channel region. For example, a channel length of approximately 0.08 μm may require a gate dielectric made of silicon dioxide as thin as approximately 1.2 nm. Although, generally, usage of high speed transistor elements having an extremely short channel may be substantially restricted to high speed signal paths, whereas transistor elements with a longer channel may be used for less critical signal paths, the relatively high leakage current caused by direct tunneling of charge carriers through an ultra-thin silicon dioxide gate insulation layer may reach values for an oxide thickness in the range of 1-2 nm that may not be compatible with thermal design power requirements for performance driven circuits.
Therefore, replacing silicon dioxide based dielectrics, at least in part, as the material for gate insulation layers has been considered, particularly for extremely thin silicon dioxide based gate layers. Possible alternative materials include materials that exhibit a significantly higher permittivity so that a physically greater thickness of a correspondingly formed gate insulation layer provides a capacitive coupling that would otherwise be obtained by an extremely thin silicon dioxide layer.
Additionally, transistor performance may be increased by providing an appropriate conductive material for the gate electrode so as to replace the usually used polysilicon material, at least in the vicinity of the gate dielectric material, since polysilicon may suffer from charge carrier depletion at the vicinity of the interface to the gate dielectric, thereby reducing the effective capacitance between the channel region and the gate electrode. Thus, a gate stack has been suggested in which a high-k dielectric material provides enhanced capacitance based on the same thickness as a silicon dioxide based layer, while additionally maintaining leakage currents at an acceptable level. On the other hand, the non-polysilicon material, such as titanium nitride and the like, in combination with other metals may be formed so as to connect to the high-k dielectric material, thereby substantially avoiding the presence of a depletion zone and providing superior conductivity compared to the doped polysilicon material. Since the threshold voltage of the transistors, which represents the voltage at which a conductive channel forms in the channel region, is significantly determined by the work function of the metal-containing gate material, an appropriate adjustment of the effective work function with respect to the conductivity type of the transistor under consideration and the performance characteristics thereof has to be guaranteed when using metal-containing electrode materials.
Providing different metal species for adjusting the work function of the gate electrode structures for P-channel transistors and N-channel transistors at an earlier manufacturing stage, may, however, be associated with a plurality of difficulties arising from the fact that a complex patterning sequence may be required during the formation of the sophisticated high-k metal gate stack. For this reason, significant variations of the resulting work functions and thus threshold voltages of the completed transistor structures may be generated. In other approaches, so-called replacement gate approaches, the gate electrode structures are provided with a high degree of compatibility with conventional patterning regimes, for instance based on polysilicon, and the high-k dielectric material and the metal-containing materials for adjusting the appropriate work functions and providing a high conductivity are incorporated in a very late manufacturing stage, i.e., after completing the basic transistor structure and thus after any high temperature processes, which may have a significant influence on the resulting characteristics of sophisticated high-k metal gate electrode structures in process strategies, in which the sensitive high-k materials in combination with the metal-containing electrode materials are provided in an early manufacturing stage.
In addition to providing sophisticated high-k metal gate electrode structures, other mechanisms are typically implemented in transistors in order to increase the overall performance, for instance in terms of the electronic characteristics of the channel region. It is well known that the channel region may have a significant influence on the overall transistor characteristics, such as threshold voltage, leakage current, drive current capability and the like. For example, the energy levels of the channel material in combination with the work function of the gate electrode material and the degree of dopant concentration may determine the threshold voltage, thereby requiring specific metal-containing electrode materials in combination with sophisticated treatments in order to adjust a proper work function for the various types of transistors in complex semiconductor devices. Consequently, by providing a specific type of semiconductor material, in particular in the channel region, an increased flexibility may be achieved in selecting appropriate electrode materials when forming sophisticated gate electrode structures. For example, frequently, upon providing the sophisticated high-k metal gate electrode structures in an early manufacturing stage, typically a silicon/germanium alloy may be formed on the silicon active region in order to provide a desired band gap offset, which may thus allow appropriately defining a work function in combination with a corresponding electrode metal, which may be appropriate for withstanding the subsequent high temperature process upon completing the basic transistor configuration. Furthermore, the type and concentration of dopants in the channel region may also influence the threshold voltage, wherein, however, an increased dopant concentration provided by ion implantation may result in increased charge carrier scattering, which in turn may reduce the drive current capability of the transistor. Furthermore, it is well known that the charge carrier mobility in the channel region may be efficiently modified by inducing a strained state therein, which may be accomplished by various strain-inducing mechanisms, such as providing an embedded strained semiconductor material in the drain and source regions, thereby inducing a desired strain component in the channel region. In other cases, highly stressed materials, such as sidewall spacers of the gate electrode structures, material layers provided in a contact level of the device and the like, may be provided in order to induce a desired strain component in the channel region, wherein, however, the strain transfer efficiency may significantly depend on process strategies, device configuration and the like.
Consequently, upon implementing sophisticated high-k metal gate electrode structures, typically, the interaction with additional performance-enhancing mechanisms may have a significant influence on the final transistor characteristics, wherein the conventional process strategies may result in a less pronounced performance enhancement as desired. For example, in approaches in which the high-k metal gate electrode structure may be provided in an early manufacturing phase, by using a silicon/germanium alloy for adjusting the threshold voltage of one type of transistors, a pronounced difference in surface topography may be caused between P-channel transistors and N-channel transistors due to the epitaxial growth of the silicon/germanium material selectively on the active regions of the P-channel transistors, which, however, may result in significant patterning-related non-uniformities of the resulting gate electrode structures. Furthermore, in these approaches, the adjustment of the work function is a very complex process and may result in significant threshold variability due to the fact that the gate electrode structure may experience the complex subsequent process flow, for instance for forming drain and source regions based on the corresponding high temperature processes. On the other hand, well-established replacement gate approaches may provide superior uniformity of transistor characteristics, for instance in terms of threshold voltage, wherein, however, the complex process for replacing placeholder material in a late manufacturing stage may result in a strong interaction with other performance-enhancing mechanisms, such as strain-inducing mechanisms, while a reduced flexibility in adjusting the overall electronic characteristics of the channel region may result in a less pronounced gain in performance.
The present disclosure is directed to various methods and devices that may avoid, or at least reduce, the effects of one or more of the problems identified above.